{"product_id":"amd-ryzen-5-3600-r5-3600-cpu-asus-tuf-b450m-pro-gaming-motherboard-suit-socket-am4-cpu-motherbaord-suit-without-cooler-motherboards","title":"AMD Ryzen 5 3600 R5 3600 CPU + Asus TUF B450M PRO GAMING Motherboard Suit Socket AM4 CPU + Motherbaord Suit Without cooler|Motherboards","description":"\u003cdiv\u003e\n\u003cdiv class=\"detailmodule_dynamic\"\u003e\u003ckse:widget data-widget-type=\"customText\" id=\"24617178\" title=\"\" type=\"custom\"\u003e\u003c\/kse:widget\u003e\u003c\/div\u003e\n \u003cdiv class=\"detailmodule_html\"\u003e\u003cdiv class=\"detail-desc-decorate-richtext\"\u003e\n\u003ch2 style=\"margin: 15px 0px 0px; padding: 2px 5px; font-size: 15px; color: rgb(0, 0, 0); font-family: verdana, helvetica, arial, sans-serif;\"\u003e AMD Ryzen 5 3600 specifications \u003c\/h2\u003e \u003cform action=\"http:\/\/www.cpu-world.com\/CPUs\/Zen\/AMD-Ryzen%205%203600.html\" style=\"margin: 0px; padding: 0px; color: rgb(0, 0, 0); font-family: verdana, helvetica, arial, sans-serif;\"\u003e \u003cp style=\"margin: 10px 0px 0px; padding: 0px 5px;\"\u003e \u003c\/p\u003e \u003cdiv class=\"spec_get\" style=\"margin: 0px; padding: 0px; float: right; width: 240px; line-height: 14.4px;\"\u003e The specs can be used for short-term\u003cbr\u003e listings on auction and classifieds sites \u003c\/div\u003e \u003cdiv class=\"spec_getb\" style=\"margin: 0px; padding: 2px 0px 0px; float: right; width: 90px;\"\u003e \u003cinput class=\"ibuttonr\" contenteditable=\"false\" data-kse-editable=\"1\" data-kse-saved-name=\"PROCESS\" name=\"PROCESS\" style=\"margin: 0px 0px 0px 5px; padding: 2px; font-family: verdana, helvetica, arial, sans-serif; font-size: 11px; color: rgb(64, 64, 64); font-weight: bold; background-color: rgb(212, 208, 200); border-width: 1px; border-style: solid; border-color: rgb(228, 224, 216) rgb(164, 160, 152) rgb(164, 160, 152) rgb(228, 224, 216); overflow: visible; cursor: pointer;\" type=\"button\" value=\"Get specs\"\u003e \u003c\/div\u003e \u003cdiv class=\"clear\" style=\"margin: 0px; padding: 0px; width: 629px; clear: both;\"\u003e \u003cbr\u003e \u003c\/div\u003e \u003c\/form\u003e \u003cdiv class=\"p_div h3_div\" style=\"margin: 10px 0px 0px; padding: 0px 5px 0px 20px; color: rgb(0, 0, 0); font-family: verdana, helvetica, arial, sans-serif;\"\u003e \u003cdiv id=\"GET_INFO\" style=\"margin: 0px; padding: 0px;\"\u003e \u003ctable border=\"0\" cellpadding=\"0\" cellspacing=\"0\" class=\"spec_table\" style=\"border-collapse: collapse; border-spacing: 0px;\" width=\"100%\"\u003e \u003ctbody\u003e \u003ctr\u003e \u003ctd class=\"spec_hd\" colspan=\"2\" style=\"margin: 0px; padding: 10px 5px; font-size: 13px; border-left: 2px solid rgb(255, 255, 255); line-height: 16.9px; vertical-align: top; font-weight: bold;\"\u003e \u003cspan style=\"min-width: 33%; border-width: 0px 0px 1px; border-top-style: initial; border-right-style: initial; border-left-style: initial; border-top-color: initial; border-right-color: initial; border-left-color: initial; border-image: initial; border-bottom-style: solid; border-bottom-color: rgb(0, 0, 0); padding: 3px !important;\"\u003eGeneral information\u003c\/span\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\" width=\"35%\"\u003e Type \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003ca data-kse-saved-href=\"http:\/\/www.cpu-world.com\/CPUs\/CPU.html\" href=\"http:\/\/www.cpu-world.com\/CPUs\/CPU.html\" style=\"color: rgb(192, 128, 64);\"\u003eCPU \/ Microprocessor\u003c\/a\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Market segment \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e Desktop \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Family \u003c\/td\u003e \u003ctd id=\"SPECTD_FAMILY\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cdiv class=\"spec_menu\" id=\"SPECDV_FAMILY\" style='margin: 2px 0px 0px; padding: 0px; width: 12px; height: 12px; float: right; background: url(\"\/Images\/cw_icons.gif\") -108px 0px;'\u003e \u003cbr\u003e \u003c\/div\u003e \u003ca data-kse-saved-href=\"http:\/\/www.cpu-world.com\/CPUs\/Zen\/TYPE-Ryzen%205.html\" href=\"http:\/\/www.cpu-world.com\/CPUs\/Zen\/TYPE-Ryzen%205.html\" style=\"color: rgb(192, 128, 64);\"\u003eAMD Ryzen 5\u003c\/a\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Model number \u003cspan class=\"_link cw_help _MODELN\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/P\/Processor_Model_number.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/P\/Processor_Model_number.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e\u003ca data-kse-saved-href=\"http:\/\/www.cpu-world.com\/CPUs\/Zen\/AMD-Ryzen%205%203600.html\" href=\"http:\/\/www.cpu-world.com\/CPUs\/Zen\/AMD-Ryzen%205%203600.html\" style=\"color: rgb(192, 128, 64);\"\u003e3600\u003c\/a\u003e\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e CPU part numbers \u003c\/td\u003e \u003ctd id=\"SPECTD_PN\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cdiv class=\"spec_menu\" id=\"SPECDV_PN\" style='margin: 2px 0px 0px; padding: 0px; width: 12px; height: 12px; float: right; background: url(\"\/Images\/cw_icons.gif\") -108px 0px;'\u003e \u003cbr\u003e \u003c\/div\u003e \u003cul class=\"ul_nobull\" style=\"margin: 0px; padding: 0px 0px 0px 20px; list-style: square;\"\u003e \u003cli style=\"margin: 0px; padding: 0px; list-style-type: none; text-indent: -20px;\"\u003e \u003cb style=\"color: rgb(128, 128, 128);\"\u003e100-000000031\u003c\/b\u003e is an OEM\/tray microprocessor \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px; list-style-type: none; text-indent: -20px;\"\u003e \u003cb style=\"color: rgb(128, 128, 128);\"\u003e100-100000031BOX\u003c\/b\u003e is a boxed microprocessor with fan and heatsink \u003c\/li\u003e \u003c\/ul\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eFrequency\u003c\/b\u003e \u003cspan class=\"_link cw_help _FREQ\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/C\/CPU_Frequency.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/C\/CPU_Frequency.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e3600 MHz\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Maximum turbo frequency \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_0\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e 4200 MHz \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Package \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_1\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e 1331-pin lidded micro-PGA package \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eSocket\u003c\/b\u003e \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003eSocket AM4\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Introduction date \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_2\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003ca data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Releases\/Desktop_CPU_releases_(2019).html#May\" href=\"http:\/\/www.cpu-world.com\/Releases\/Desktop_CPU_releases_(2019).html#May\" style=\"color: rgb(192, 128, 64);\"\u003eMay 26, 2019 (announcement)\u003cbr\u003e July 7, 2019 (availability)\u003c\/a\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Price at introduction \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_3\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e $199 \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd class=\"spec_hd\" colspan=\"2\" style=\"margin: 0px; padding: 10px 5px; font-size: 13px; border-left: 2px solid rgb(255, 255, 255); line-height: 16.9px; vertical-align: top; font-weight: bold;\"\u003e \u003cspan style=\"min-width: 33%; border-width: 0px 0px 1px; border-top-style: initial; border-right-style: initial; border-left-style: initial; border-top-color: initial; border-right-color: initial; border-left-color: initial; border-image: initial; border-bottom-style: solid; border-bottom-color: rgb(0, 0, 0); padding: 3px !important;\"\u003eArchitecture \/ Microarchitecture\u003c\/span\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Microarchitecture \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_4\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e Zen 2 \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Processor core \u003cspan class=\"_link cw_help _CORE_NAME\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/C\/Core_name.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/C\/Core_name.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_5\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e Matisse \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e CPUID \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_6\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e 870F10 \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Manufacturing process \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_7\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e 0.007 micron FinFET process \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eData width\u003c\/b\u003e \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e64 bit\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eThe number of CPU cores\u003c\/b\u003e \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e6\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eThe number of threads\u003c\/b\u003e \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_8\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e12\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Floating Point Unit \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e Integrated \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Level 1 cache size \u003cspan class=\"_link cw_help _L1\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/L\/Level_1_cache.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/L\/Level_1_cache.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_9\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e 6 x 32 KB 8-way set associative instruction caches\u003cbr\u003e 6 x 32 KB 8-way set associative data caches \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eLevel 2 cache size\u003c\/b\u003e \u003cspan class=\"_link cw_help _L2\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/L\/Level_2_cache.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/L\/Level_2_cache.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_10\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e6 x 512 KB 8-way set associative unified caches\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eLevel 3 cache size\u003c\/b\u003e \u003c\/td\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e2 x 16 MB 16-way set associative shared caches\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Cache latency \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_11\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e 4 (L1 cache)\u003cbr\u003e 12 (L2 cache)\u003cbr\u003e 40 (L3 cache) \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Multiprocessing \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_12\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e Uniprocessor \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Extensions and Technologies \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_13\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cul style=\"margin: 0px; padding: 0px 0px 0px 11px; list-style: square;\"\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e MMX instructions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e Extensions to MMX \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SSE \/ Streaming SIMD Extensions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SSE2 \/ Streaming SIMD Extensions 2 \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SSE3 \/ Streaming SIMD Extensions 3 \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SSSE3 \/ Supplemental Streaming SIMD Extensions 3 \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SSE4 \/ SSE4.1 + SSE4.2 \/ Streaming SIMD Extensions 4 \u003cspan class=\"_link cw_help _SSE4\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/S\/SSE4.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/S\/SSE4.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SSE4a \u003cspan class=\"_link cw_help _SSE4A\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/S\/SSE4a.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/S\/SSE4a.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e AES \/ Advanced Encryption Standard instructions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e AVX \/ Advanced Vector Extensions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e AVX2 \/ Advanced Vector Extensions 2.0 \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e BMI \/ BMI1 + BMI2 \/ Bit Manipulation instructions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e F16C \/ 16-bit Floating-Point conversion instructions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e FMA3 \/ 3-operand Fused Multiply-Add instructions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SHA \/ Secure Hash Algorithm extensions \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e AMD64 \/ AMD 64-bit technology \u003cspan class=\"_link cw_help _AMD64\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/A\/AMD64_technology.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/A\/AMD64_technology.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SMT \/ Simultaneous MultiThreading \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e Precision Boost 2 \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e AMD-V \/ AMD Virtualization technology \u003c\/li\u003e \u003c\/ul\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Security Features \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_14\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cul style=\"margin: 0px; padding: 0px 0px 0px 11px; list-style: square;\"\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e EVP \/ Enhanced Virus Protection \u003cspan class=\"_link cw_help _EVP_XD\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/E\/EVP_XD.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/E\/EVP_XD.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SMAP \/ Supervisor Mode Access Prevention \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e SMEP \/ Secure Mode Execution Protection \u003c\/li\u003e \u003c\/ul\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Low power features \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_15\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cul style=\"margin: 0px; padding: 0px 0px 0px 11px; list-style: square;\"\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e Pure Power \u003c\/li\u003e \u003c\/ul\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd class=\"spec_hd\" colspan=\"2\" style=\"margin: 0px; padding: 10px 5px; font-size: 13px; border-left: 2px solid rgb(255, 255, 255); line-height: 16.9px; vertical-align: top; font-weight: bold;\"\u003e \u003cspan style=\"min-width: 33%; border-width: 0px 0px 1px; border-top-style: initial; border-right-style: initial; border-left-style: initial; border-top-color: initial; border-right-color: initial; border-left-color: initial; border-image: initial; border-bottom-style: solid; border-bottom-color: rgb(0, 0, 0); padding: 3px !important;\"\u003eIntegrated peripherals \/ components\u003c\/span\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Integrated graphics \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_16\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e None \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Memory controller \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_17\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e Memory channels: 2\u003cbr\u003e Supported memory: DDR4-3200\u003cbr\u003e DIMMs per channel: 2 \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Other peripherals \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_18\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cul style=\"margin: 0px; padding: 0px 0px 0px 11px; list-style: square;\"\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e PCI-Express 4.0 interface (16 lanes) \u003c\/li\u003e \u003c\/ul\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd class=\"spec_hd\" colspan=\"2\" style=\"margin: 0px; padding: 10px 5px; font-size: 13px; border-left: 2px solid rgb(255, 255, 255); line-height: 16.9px; vertical-align: top; font-weight: bold;\"\u003e \u003cspan style=\"min-width: 33%; border-width: 0px 0px 1px; border-top-style: initial; border-right-style: initial; border-left-style: initial; border-top-color: initial; border-right-color: initial; border-left-color: initial; border-image: initial; border-bottom-style: solid; border-bottom-color: rgb(0, 0, 0); padding: 3px !important;\"\u003eElectrical \/ Thermal parameters\u003c\/span\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e Maximum operating temperature \u003cspan class=\"_link cw_help _MIN_MAX_TEMP\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/M\/Minimum_Maximum_operating_temperatures.html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/M\/Minimum_Maximum_operating_temperatures.html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_19\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e 95°C \u003c\/td\u003e \u003c\/tr\u003e \u003ctr bgcolor=\"#F0F0F0\"\u003e \u003ctd style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\" valign=\"top\"\u003e \u003cb\u003eThermal Design Power\u003c\/b\u003e \u003cspan class=\"_link cw_help _TDP\" style=\"color: rgb(255, 255, 255); font-size: 9px; padding: 0px;\"\u003e\u003ca class=\"_link\" data-kse-saved-href=\"http:\/\/www.cpu-world.com\/Glossary\/T\/Thermal_Design_Power_(TDP).html\" href=\"http:\/\/www.cpu-world.com\/Glossary\/T\/Thermal_Design_Power_(TDP).html\" style=\"color: rgb(255, 255, 255); text-decoration-line: none; padding: 0px; background-color: rgb(128, 192, 128); border: 1px solid rgb(128, 192, 128); border-radius: 8px;\" target=\"_blank\"\u003e ? \u003c\/a\u003e\u003c\/span\u003e \u003c\/td\u003e \u003ctd class=\"\" id=\"JSc_20\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cb\u003e65 Watt\u003c\/b\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd class=\"spec_hd\" colspan=\"2\" style=\"margin: 0px; padding: 10px 5px; font-size: 13px; border-left: 2px solid rgb(255, 255, 255); line-height: 16.9px; vertical-align: top; font-weight: bold;\"\u003e \u003cspan style=\"min-width: 33%; border-width: 0px 0px 1px; border-top-style: initial; border-right-style: initial; border-left-style: initial; border-top-color: initial; border-right-color: initial; border-left-color: initial; border-image: initial; border-bottom-style: solid; border-bottom-color: rgb(0, 0, 0); padding: 3px !important;\"\u003eNotes on AMD Ryzen 5 3600\u003c\/span\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003ctr\u003e \u003ctd colspan=\"2\" style=\"margin: 0px; padding: 3px 5px; border-left: 2px solid rgb(255, 255, 255); line-height: 15.6px; vertical-align: top;\"\u003e \u003cdiv class=\"\" id=\"JSc_21\" style=\"margin: 0px; padding: 0px;\"\u003e \u003cul style=\"margin: 0px; padding: 0px 0px 0px 11px; list-style: square;\"\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e The processor has unlocked clock multiplier \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e Boxed processor comes with Wraith Stealth fan\/heatsink \u003c\/li\u003e \u003cli style=\"margin: 0px; padding: 0px;\"\u003e PCI Express, Infinity Fabric, memory controllers and extra I\/O logic are located on a separate die, which is manufactured on 0.014 micron technology \u003c\/li\u003e \u003c\/ul\u003e \u003c\/div\u003e \u003c\/td\u003e \u003c\/tr\u003e \u003c\/tbody\u003e \u003c\/table\u003e \u003c\/div\u003e \u003c\/div\u003e \u003cp\u003e \u003c\/p\u003e \u003cp\u003e \u003cbr\u003e \u003c\/p\u003e \u003c\/div\u003e\u003c\/div\u003e\n \u003cdiv class=\"detailmodule_image\"\u003e\n\n\u003c\/div\u003e\n \u003cdiv class=\"detailmodule_image\"\u003e\n\n\u003c\/div\u003e\n \u003cdiv class=\"detailmodule_dynamic\"\u003e\u003ckse:widget data-widget-type=\"customText\" id=\"24586688\" title=\"\" type=\"custom\"\u003e\u003c\/kse:widget\u003e\u003c\/div\u003e\n  \u003c\/div\u003e","brand":"Frontier General Hardware","offers":[{"title":"Default Title","offer_id":47594437214400,"sku":"BP-5069-AMD-Def","price":695.12,"currency_code":"CAD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0747\/8768\/4544\/files\/AMD-Ryzen-5-3600-R5-3600-CPU-Asus-TUF-B450M-PRO-GAMING-Motherboard-Suit-Socket-AM4__20790.1600401222.1280.1280.jpg?v=1772250135","url":"https:\/\/frontiergeneralhardware.net\/products\/amd-ryzen-5-3600-r5-3600-cpu-asus-tuf-b450m-pro-gaming-motherboard-suit-socket-am4-cpu-motherbaord-suit-without-cooler-motherboards","provider":"Frontier General Hardware","version":"1.0","type":"link"}